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10 Paging (OS) MCQ

10 multiple-choice numerical questions on paging in operating systems for UGC NET, SET, ISRO and Other exam.

Question 1: Page Size Calculation

Q1: If a system uses a 32-bit address space and a page size of 4 KB, how many pages are there in the address space?

  • A) 1024

  • B) 4096

  • C) 1048576

  • D) 262144

Answer: C) 1048576

Explanation:
The number of pages is calculated as:

Total address spacePage size=232 bytes212 bytes=220=1048576 pages\frac{\text{Total address space}}{\text{Page size}} = \frac{2^{32} \text{ bytes}}{2^{12} \text{ bytes}} = 2^{20} = 1048576 \text{ pages}

Question 2: Number of Frames

Q2: If the physical memory is 1 GB and the page size is 4 KB, how many frames are available in the physical memory?

  • A) 256

  • B) 1024

  • C) 256000

  • D) 262144

Answer: D) 262144

Explanation:
The number of frames is given by:

Physical memoryPage size=1 GB4 KB=230 bytes212 bytes=218=262144 frames\frac{\text{Physical memory}}{\text{Page size}} = \frac{1 \text{ GB}}{4 \text{ KB}} = \frac{2^{30} \text{ bytes}}{2^{12} \text{ bytes}} = 2^{18} = 262144 \text{ frames}

Question 3: Page Number and Offset

Q3: In a system with a 16-bit address space and a page size of 256 bytes, what are the page number and offset for the address 0x1234?

  • A) Page number: 0x12, Offset: 0x34

  • B) Page number: 0x123, Offset: 0x4

  • C) Page number: 0x1, Offset: 0x234

  • D) Page number: 0x1234, Offset: 0x0

Answer: A) Page number: 0x12, Offset: 0x34

Explanation:
Page number is obtained by dividing the address by the page size (256 bytes = 2⁸).

0x1234/256=0x120x1234 / 256 = 0x12

Offset is the remainder:

0x1234mod  256=0x340x1234 \mod 256 = 0x34

Question 4: Address Translation

Q4: If the logical address is 0x1A3 and the page size is 64 bytes, what is the physical address assuming the page table entry for the page is 0x02?

  • A) 0x02A3

  • B) 0x00A3

  • C) 0x0223

  • D) 0x0243

Answer: C) 0x0223

Explanation:
Page number: 0x1A3/64=0x60x1A3 / 64 = 0x6
Offset: 0x1A3mod  64=0x230x1A3 \mod 64 = 0x23
Physical address: The page table entry provides frame number 0x02, so the physical address is:

Physical address=(Frame number×Page size)+Offset=(0x02×64)+0x23=0x0223\text{Physical address} = (\text{Frame number} \times \text{Page size}) + \text{Offset} = (0x02 \times 64) + 0x23 = 0x0223

Question 5: Effective Access Time (EAT)

Q5: If the memory access time is 100 ns and the page fault service time is 20 ms, what is the effective access time if the page fault rate is 0.001?

  • A) 20.1 ms

  • B) 200 ns

  • C) 20.0001 ms

  • D) 200.1 ns

Answer: B) 200 ns

Explanation:

EAT=(1−p)×Memory access time+p×Page fault timeEAT = (1 - p) \times \text{Memory access time} + p \times \text{Page fault time} =(1−0.001)×100+0.001×20,000,000= (1 - 0.001) \times 100 + 0.001 \times 20,000,000 =99.9+20000=200ns= 99.9 + 20000 = 200 ns

Question 6: Page Table Size

Q6: For a system with a 64-bit address space and a page size of 4 KB, what is the size of the page table assuming each page table entry is 8 bytes?

  • A) 64 GB

  • B) 32 MB

  • C) 64 MB

  • D) 128 MB

Answer: D) 128 MB

Explanation:
Number of pages:

264212=252\frac{2^{64}}{2^{12}} = 2^{52}

Page table size:

252×8 bytes=255 bytes=128 MB2^{52} \times 8 \text{ bytes} = 2^{55} \text{ bytes} = 128 \text{ MB}

Question 7: Number of Pages

Q7: In a system with a 48-bit virtual address space and a page size of 8 KB, how many pages are there?

  • A) 2352^{35}

  • B) 2362^{36}

  • C) 2342^{34}

  • D) 2332^{33}

Answer: C) 2342^{34}

Explanation:

Number of pages=248213=234\text{Number of pages} = \frac{2^{48}}{2^{13}} = 2^{34}

Question 8: TLB Hit Ratio

Q8: If the TLB hit time is 20 ns, the memory access time is 100 ns, and the TLB hit ratio is 90%, what is the effective memory access time?

  • A) 102 ns

  • B) 108 ns

  • C) 110 ns

  • D) 120 ns

Answer: B) 108 ns

Explanation:

EAT=(Hit ratio×(TLB time+Memory time))+(Miss ratio×(TLB time+2×Memory time))EAT = (\text{Hit ratio} \times (\text{TLB time} + \text{Memory time})) + (\text{Miss ratio} \times (\text{TLB time} + 2 \times \text{Memory time})) =(0.9×120)+(0.1×220)=108= (0.9 \times 120) + (0.1 \times 220) = 108

Question 9: Page Table Levels

Q9: In a system with a 32-bit address space and 4 KB pages, what is the number of page table levels if each page table entry is 4 bytes and each level can map a maximum of 1024 entries?

  • A) 2

  • B) 3

  • C) 4

  • D) 5

Answer: B) 3

Question 10: Effective Access Time with Page Faults

Q10: If the memory access time is 200 ns, the page fault service time is 10 ms, and the page fault rate is 0.0005, what is the effective access time?

  • A) 200 ns

  • B) 205 ns

  • C) 202 ns

  • D) 502 ns

Answer: D) 502 ns


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